Clock and Control System R&D
At UCL, we designed, built and delivered the Clock and Control (CC) system which provides the detector's interface to the accelerator and communicates with the data acquisition system. There are several detector designs, based on different silicon pixel technologies, but for the purpose of controlling their data acquisition systems they will use a common CC system. Additionally, prototype and final detectors may be operated at other light sources (e.g. FLASH and LCLS), so a flexible and intelligent CC system is needed to interface to the different bunch time structures.
A schematic of the data flow for the readout and passing of CC data for a Megapixel detector is shown below. Each detector is split into (e.g. 16) sub-unit modules for the purposes of readout and CC data. The system exploits the advances in data handling provided by the new Telecommunication Crate Architecture (TCA) standards, AdvancedTCA and MicroTCA. This is compatible with the EuXFEL timing system and the data acquisition system which also both use the TCA standard.
This work was funded by EuXFEL, was in collaboration with RAL TID, and is part of the WP76: DAQ & Control group.