ELogs/Electronics: Difference between revisions

From PBTWiki
Jump to navigation Jump to search
No edit summary
No edit summary
 
Line 51: Line 51:


[mailto:duncan.parker@imperial.ac.uk Duncan Parker]
[mailto:duncan.parker@imperial.ac.uk Duncan Parker]
[mailto:m.saleh@imperial.ac.uk Munir Saleh]


=== QuADProBe FPGA Upgrade ===
=== QuADProBe FPGA Upgrade ===
Line 60: Line 62:
* Kria available off-the-shelf but carrier board needed
* Kria available off-the-shelf but carrier board needed
* Imperial to design carrier board with multiple I/O for QuADProBe:
* Imperial to design carrier board with multiple I/O for QuADProBe:
** [https://imperiallondon-my.sharepoint.com/:f:/g/personal/awr01_ic_ac_uk/EgRdTysqlVBClK6T9m6lPfoBcTIIgF5YVhDBvWghjhb7Ig?e=5%3acq2U8p&at=9&xsdata=MDV8MDJ8cy5qb2xseUB1Y2wuYWMudWt8ZGZkYjUxMzAwYmNlNGQzNjc3NGYwOGRkYzg0OGJiZmV8MWZhZjg4ZmVhOTk4NGM1YjkzYzkyMTBhMTFkOWE1YzJ8MHwwfDYzODg4NjkzNjkzMDgzMjM3NXxVbmtub3dufFRXRnBiR1pzYjNkOGV5SkZiWEIwZVUxaGNHa2lPblJ5ZFdVc0lsWWlPaUl3TGpBdU1EQXdNQ0lzSWxBaU9pSlhhVzR6TWlJc0lrRk9Jam9pVFdGcGJDSXNJbGRVSWpveWZRPT18MHx8fA%3d%3d&sdata=YXh6bkdTZGRqWVhha1Q5VW1OY2pPNWMrRGIxblZjbStUcXVJVTFaTUtURT0%3d Imperial Kria DAQ for QuARC Documents]
** [https://imperiallondon-my.sharepoint.com/:f:/r/personal/awr01_ic_ac_uk/Documents/KriaDAQ Imperial One-drive folder for Kria DAQ Documents]
** [https://imperiallondon-my.sharepoint.com/:p:/g/personal/awr01_ic_ac_uk/EY7mhF35mrpNpBUfO3pgTWYBPzMu3WOi93Z0Pi--k1h6TA?xsdata=MDV8MDJ8cy5qb2xseUB1Y2wuYWMudWt8ZDc4NTM3Mjk5NmNiNDkzNThhYmYwOGRkZDUyMWZkMmZ8MWZhZjg4ZmVhOTk4NGM1YjkzYzkyMTBhMTFkOWE1YzJ8MHwwfDYzODkwMTA2NDE3NTY4MjE5OXxVbmtub3dufFRXRnBiR1pzYjNkOGV5SkZiWEIwZVUxaGNHa2lPblJ5ZFdVc0lsWWlPaUl3TGpBdU1EQXdNQ0lzSWxBaU9pSlhhVzR6TWlJc0lrRk9Jam9pVFdGcGJDSXNJbGRVSWpveWZRPT18MHx8fA%3d%3d&sdata=ODVLOGhtTFplUU9xaWpFazNqZkNsekNjWXVKM3EyR0V1N2poc3lxNHdQZz0%3d Rough board layout (PPTX)]
** [https://imperiallondon-my.sharepoint.com/:p:/r/personal/awr01_ic_ac_uk/Documents/KriaDAQ/QUARC%20evolution.pptx?d=w174b6813c4c74a809a787aaea406ed28 Evolution of QuARC Electronics (PPTX)]
** [https://imperiallondon-my.sharepoint.com/:p:/r/personal/awr01_ic_ac_uk/Documents/KriaDAQ/QUARC%20evolution.pptx?d=w174b6813c4c74a809a787aaea406ed28&csf=1&web=1&e=luRiE3&xsdata=MDV8MDJ8cy5qb2xseUB1Y2wuYWMudWt8ZDc4NTM3Mjk5NmNiNDkzNThhYmYwOGRkZDUyMWZkMmZ8MWZhZjg4ZmVhOTk4NGM1YjkzYzkyMTBhMTFkOWE1YzJ8MHwwfDYzODkwMTA2NDE3NTY2OTcwMXxVbmtub3dufFRXRnBiR1pzYjNkOGV5SkZiWEIwZVUxaGNHa2lPblJ5ZFdVc0lsWWlPaUl3TGpBdU1EQXdNQ0lzSWxBaU9pSlhhVzR6TWlJc0lrRk9Jam9pVFdGcGJDSXNJbGRVSWpveWZRPT18MHx8fA%3d%3d&sdata=MlBJaE9ueW4yQkdiZnNBbE8xTm9GSXBkdEpORHNyYWlPbGdRQS9SVlI1TT0%3d Evolution of QuARC Electronics (PPTX)]
** [https://imperiallondon-my.sharepoint.com/:w:/r/personal/awr01_ic_ac_uk/Documents/KriaDAQ/Specification.docx?d=w07d339959a8449428d3d68664ff5b519 SPECIFICATION DOCUMENT (DOCX)]
 
==== IO specification====
 
* Connections for AMD Kria K26 system-on-module
* 11 "USB-C" IO connector
** Vertical right-angle ("flag") connector
** 5x differential-pairs, at-least one connected to HP clock-capable pins
** 4x single-ended, to 3v3 HD pins
** 20V power - power-enable, O/V and O/C protection
* 1 “USB-C” IO connector
** Vertical right-angle (“flag”) connector
** 3x differential-pairs, connected to HP global-clock pins
** 4x single-ended, to 3v3 HD pins
** 20V power - power-enable, O/V and O/C protection
* GbE via RJ45
* 2 x M.2 SATA disk
** M key (B key compatible - assembly-time choice of connector)
** SATA SSD or 2-lane Gen-2 PCIe (requires polarity flip of RX in Kria config)
** 2230, 2242, 2260 & 2280 mounting holes
* uSD card
* RPI5-compatable PCIe
** 16-pin, single-sided, 0.5mm pitch FFC
** Connect to PL GTH transceivers
* SFP cage & connector
** Connect to PL GTH transceivers
** Do-not-fit on initial design
* Debug header
** USB-C connector → Breakout board
** PS Switches
** PS LEDs
** PS UART
 
==== Power specification ====
 
* USB-C power connection – 5A @ 20V
** Requires negotiation
* Barrel-jack fall-back power
* Hold-up caps
* 2-pin fan-header
 
==== Mechanical specification ====
 
* As low-profile as possible
* Not overly constrained in lateral dimensions – as compact as reasonably possible
* Mounting holes
* Heatsink?
* All connector on one edge?
** Except RPI PCIe (and fan-header if used)
 
==== To-do ====
 
* Swap USBs to flag-type
* Make power switches disabled by default (pull-up on En# lines)
* I2C for power negotiator
** 20V USB-C PD/DC power input
** 11 x USB-C sockets connected to PL for detector interface

Latest revision as of 15:24, 1 September 2025

Electronic Log for Electronics Development

Oxford

Pete Hastings

Mark Jones

Power supply board

Ready for experimental visit to Trento, 28th September 2025

  • Power distribution board required for QuARC.
  • Provide power for Raspberry Pi and DDC boards from single DC input:
    • 5V/5A for Raspberry Pi via USB-C
    • >7.5V (5A?) for DDC board daisy chain via 2.5mm barrel
  • Single USB-C PD input: 20V/5A
    • Needs USB-C PD voltage negotiation chip
  • Fallback option with 20V DC 2.5mm barrel jack input
  • LEDs to indicate each voltage is provided correctly:
    • 20V input
    • 5V to Raspberry Pi
    • >7.5V to DDC boards
  • Should be able to switch off LEDs
  • Necessary to switch between input power supplies?
  • Ensure both power outputs stable: no drop-outs!
    • Potential for USB-C PD to drop out when voltage renegotiated?

DDC Photodiode Board Rev.G

Upon completion of power distribution board

Scintillating Fibre Profile Monitor Front-end Boards

Upon completion of Rev.F board

  • Integration of scintillating fibre profile monitor based on design from Blake Leverington, University of Heidelberg
  • Hamamatsu S17285 photodiode arrays to couple to scintillating fibres
  • Interface board needed between USB-C connection from FPGA and photodiode arrays
  • Acquire data; distribute timing signals

Imperial

Andy Rose

Duncan Parker

Munir Saleh

QuADProBe FPGA Upgrade

Retrieved from "https://www.hep.ucl.ac.uk/pbt/pbtWiki/index.php?title=ELogs/Electronics&oldid=5984"