Helix Registers

Helix Driver Registers

In all cases, the command and data are expected to be issued simultaneously.
When a valid address is detected the offset is decoded and results in a command to the board.
Whatever data is sent to that address is used with that command.
The format of the registers storing the Serial Data and it's relationship to the actual data output is shown here.

The following is a table of valid commands, and the address offsets needed to generate them. Except for real read/writes to physical registers all commands can be generated as VME read or writes. All other offsets are ignored.

Command

Address Offset

Activation

vhreset

Issue Helix reset

0

read or write

vsr_low

Shift Register LSBs (16)

1

read or write

(16 bit physical register)

vsr_high

Shift Register MSBs (5)

2

read or write

(5 bit physical register)

vfb_low

Feedback Register LSBs (16)

3

read

(16 bit physical register)

vfb_high

Feedback Register MSBs (4)

4

read

(4 bit physical register)

vhloaden

Load helix (serial data) mode

(trigger bypass)

5

read or write

(default: trigger mode,

requires vreset to disable)

vstart

Start serial data output

6

read

vreset

Reset PLD registers

7

read or write

Typical sequence:

Reset pld. Offset 7, read.

Put pld into load helix mode (can occur anytime before vstart) Offset 5, read.

load s/r LSBs. Offset 1, write xxxx. (Offset 1, read xxxx? to check loading.)

load s/r MSBs. Offset 2, write xxxx. (Offset 2, read xxxx? to check loading.)

Start outputing serial data from s/r (to Helix). Offset 6, read.

put pld into trigger (pass-through) mode Offset 7, read.

DAH / 3 March 2000

Command	Address Offset	Activation
vhreset Issue Helix reset	0	read or write
vsr_low Shift Register LSBs (16)	1	read or write (16 bit physical register)
vsr_high Shift Register MSBs (5)	2	read or write (5 bit physical register)
vfb_low Feedback Register LSBs (16)	3	read (16 bit physical register)
vfb_high Feedback Register MSBs (4)	4	read (4 bit physical register)
vhloaden Load helix (serial data) mode (trigger bypass)	5	read or write (default: trigger mode, requires vreset to disable)
vstart Start serial data output	6	read
vreset Reset PLD registers	7	read or write