Proton Calorimetry/Meetings/2021/01/27: Difference between revisions

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=== [[ELogs/SaadShaikh|Saad Shaikh]] ===
=== [[ELogs/SaadShaikh|Saad Shaikh]] ===
*Conducted tests at UCL with Simon to diagnose daisy-chain problem with oscilloscope.
**Found that DCLK and DVALID have only 2-3ns delay across boards, nothing significant.
**Managed two fry two boards during experiment, they still work on their own and in daisy-chain, but are quite noisy.
**Tried delaying DCLK after DVALID is received by 1, 2, 5 and 10us, to no avail.
**Collected remaining 34 S12915-16R photodiodes at UCL.
*Contacted Electrical Engineering and Texas Instruments about daisy-chain problems, sent them [http://www.hep.ucl.ac.uk/pbt/wikiData/presentations/2021/SS210125_EE.pptx this presentation].
*Continued work on USB interface. Fixed a few bugs and all is stable but need to improve handling of data sent from PC to FPGA.
*Will add features to DAQ framework:
**Setting number of DDC232 boards remotely.
**DAQ to start a new file after every 100 measurements.
**CSV generation to average each file and write averaged, single-line decimals to file.


=== [[ELogs/FernPannell|Fern Pannell]] ===
=== [[ELogs/FernPannell|Fern Pannell]] ===

Latest revision as of 17:42, 27 January 2021

Minutes for UCL Proton Calorimetry Meetings, 27th January

Present

Simon Jolly, Raffaella Radogna, Saad Shaikh, Fern Pannell

Raffaella Radogna

Saad Shaikh

  • Conducted tests at UCL with Simon to diagnose daisy-chain problem with oscilloscope.
    • Found that DCLK and DVALID have only 2-3ns delay across boards, nothing significant.
    • Managed two fry two boards during experiment, they still work on their own and in daisy-chain, but are quite noisy.
    • Tried delaying DCLK after DVALID is received by 1, 2, 5 and 10us, to no avail.
    • Collected remaining 34 S12915-16R photodiodes at UCL.
  • Contacted Electrical Engineering and Texas Instruments about daisy-chain problems, sent them this presentation.
  • Continued work on USB interface. Fixed a few bugs and all is stable but need to improve handling of data sent from PC to FPGA.
  • Will add features to DAQ framework:
    • Setting number of DDC232 boards remotely.
    • DAQ to start a new file after every 100 measurements.
    • CSV generation to average each file and write averaged, single-line decimals to file.

Fern Pannell