Proton Calorimetry/Experimental Runs/2021/Mar4: Difference between revisions

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!Description
!Description
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|1 || 3, 1 || board rotation and sweep covering of photodiodes || |
|1 || 3, 1 || board rotation and sweep covering of photodiodes |
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|2 || 3, 4 || board rotation and sweep covering of photodiodes |
|2 || 3, 4 || board rotation and sweep covering of photodiodes |
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|3 || 3, 2 || board rotation and sweep covering of photodiodes |
|3 || 3, 2 || board rotation and sweep covering of photodiodes |
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|4 || || board rotation and sweep covering of photodiodes |
|4 || 3, 1, 4 || board rotation and sweep covering of photodiodes |
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|5 || || board rotation and sweep covering of photodiodes |
|5 || 3, 4, 1 || board rotation and sweep covering of photodiodes |
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|6 || || swept exposure of photodiodes |
|6 || 3, 4, 1 || swept exposure of photodiodes |
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|7 || || reversed swept exposure of photodiodes |
|7 || 3, 4, 1 || reversed swept exposure of photodiodes |
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|8 || || board rotation and sweep/finger covering of photodiodes |
|8 || 4, 3, 1 || board rotation and sweep/finger covering of photodiodes |
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|9 || || board rotation and sweep covering of photodiodes |
|9 || 3, 4, 2 || board rotation and sweep covering of photodiodes |
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|10 ||  || board rotation and sweep covering of photodiodes |
|10 || 3, 2, 4 || board rotation and sweep covering of photodiodes |
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|11 || || board rotation and sweep covering of photodiodes |
|11 || 3, 1, 4, 2 || board rotation and sweep covering of photodiodes |
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|12 || || board rotation and sweep covering of photodiodes |
|12 || 3, 4, 2, 1 || board rotation and sweep covering of photodiodes |
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|13 || 3, 2, 1, 4 || board rotation and sweep covering of photodiodes |
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Revision as of 09:52, 5 March 2021

Daisy chain tests of second DDC232 prototype in D109

Aim: Debug "mirroring" issues when daisy-chaining more than 2 DDC232s boards.

Notes

  • DDC232 boards have a numerical identifier:
    • Board 1: S1337-16BR photodiodes
    • Board 2: 1k ohm resistors
    • Board 3: S1227-16BQ photodiodes
    • Board 4: S12915-16R photodiodes
  • In the runs listed, boards are listed right to left, with the right-most board connected to the FPGA.
  • In all runs, an integration time of 170us and full-scale range of 350pC is used.

Data saved in unix/pbt/data/ucl/20201112/

Run Board Configuration Description
1 3, 1
2 3, 4
3 3, 2
4 3, 1, 4
5 3, 4, 1
6 3, 4, 1
7 3, 4, 1
8 4, 3, 1
9 3, 4, 2
10 3, 2, 4
11 3, 1, 4, 2
12 3, 4, 2, 1
13 3, 2, 1, 4