Proton Calorimetry/Equipment/FPGAs DDC232: Difference between revisions

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A Texas Instruments (Dallas, Texas, United States) DDC232CK (DDC) was chosen as the current-input analogue-to-digital converter for its speed, large dynamic range and low power requirements. It is capable of measuring the currents of up to 32 photodiodes with an adjustable integration time (160μs–1s) and full-scale range (FSR, 12pC–350pC). Each of the 32 inputs on the DDC has two integrators, allowing for zero-deadtime measurements: while one integrator digitises and transfers data, the other measures the input current. The DDC is housed on a compact custom circuit board manufactured by CosyLab (Ljubljana, Slovenia), where the charge collected by a photodiode is split across two DDC inputs to give 16 photodiodes per DDC. The role of each digital signal is described below:
 
*CLK (input): 10 MHz clocking signal that is used to time the internal operations of the DDC, including generation of DV ALID.
*CONV (input): signal that controls integration, the time period of which is equal to the integration time. When this signal toggles, the integrator of each input switches.
*DIN_CFG (input): serial data stream of the 12-bit sequence used to set key parameters of the DDC, namely the FSR and measurement precision (16-bit or 20-bit).
*CLK_CFG (input): 20 MHz clocking signal used to time sending and reading of DIN_CFG.
*RESET (input): Asynchronous active-low reset signal for the DDC to revert it to its power-up state.
*DCLK (input): 20 MHz clocking signal used to time sending and reading of DOUT.
*DVALID (output): active-low signal used to indicate that data is ready to be read on DOUT.
*DOUT (output): serial data stream of the 640-bit sequence (when in 20-bit precision mode) containing measurements of the 32 inputs.
*DIN (input): serial data input to the DDC used to daisy-chain other DDCs (see section 3.4).

Revision as of 14:56, 8 September 2020

A Texas Instruments (Dallas, Texas, United States) DDC232CK (DDC) was chosen as the current-input analogue-to-digital converter for its speed, large dynamic range and low power requirements. It is capable of measuring the currents of up to 32 photodiodes with an adjustable integration time (160μs–1s) and full-scale range (FSR, 12pC–350pC). Each of the 32 inputs on the DDC has two integrators, allowing for zero-deadtime measurements: while one integrator digitises and transfers data, the other measures the input current. The DDC is housed on a compact custom circuit board manufactured by CosyLab (Ljubljana, Slovenia), where the charge collected by a photodiode is split across two DDC inputs to give 16 photodiodes per DDC. The role of each digital signal is described below:

  • CLK (input): 10 MHz clocking signal that is used to time the internal operations of the DDC, including generation of DV ALID.
  • CONV (input): signal that controls integration, the time period of which is equal to the integration time. When this signal toggles, the integrator of each input switches.
  • DIN_CFG (input): serial data stream of the 12-bit sequence used to set key parameters of the DDC, namely the FSR and measurement precision (16-bit or 20-bit).
  • CLK_CFG (input): 20 MHz clocking signal used to time sending and reading of DIN_CFG.
  • RESET (input): Asynchronous active-low reset signal for the DDC to revert it to its power-up state.
  • DCLK (input): 20 MHz clocking signal used to time sending and reading of DOUT.
  • DVALID (output): active-low signal used to indicate that data is ready to be read on DOUT.
  • DOUT (output): serial data stream of the 640-bit sequence (when in 20-bit precision mode) containing measurements of the 32 inputs.
  • DIN (input): serial data input to the DDC used to daisy-chain other DDCs (see section 3.4).